{"id":91,"date":"2018-07-26T10:03:17","date_gmt":"2018-07-26T10:03:17","guid":{"rendered":"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/?post_type=chapter&#038;p=91"},"modified":"2018-08-10T11:24:10","modified_gmt":"2018-08-10T11:24:10","slug":"programming-timers","status":"publish","type":"chapter","link":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/chapter\/programming-timers\/","title":{"rendered":"Programming Timers"},"content":{"raw":"<div>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">In this lecture, different timers and its modes will be discussed. Importance of Timer control registers for configuring timers and its structures will be discussed. Different delay routines using timers and different timer modes will be created and shown using assembly code.<\/p>\r\n&nbsp;\r\n\r\n<strong>1. Timers<\/strong>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">In 8051 microcontroller, there are two 16-bit timers, namely, Timer 0 and Timer 1. These timers can be configured to work as counter, and also independently configured to operate in a variety of modes as a timer or as an event counter. Timers &amp; Counters in 8051 controllers are used to create Interval timing for a product, Periodic event timing, Timer base for measurements and also to generate Baud Rate for serial communication. Counters are used for event Counting using timers in 16-bit mode\/ 8 bit mode. When operating as a timer, the timer\/counter runs for a programmed length of time, then issues an interrupt request. When operating as a counter, the timer\/counter counts negative transitions on an external pin. After a preset number of counts, the counter issues an interrupt request.<\/p>\r\n&nbsp;\r\n\r\n<strong>1.1 Operation<\/strong>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">Timer consists of registers THx and TLx (x= 0, 1) connected in cascade to form a 16-bit timer i.e register TH0 and TL0 are combined together to form Timer 0 and register TH1 and TL1 are combined together to form Timer1. For controlling the timer, the run control bit (TRx) in TCON register is used which turns the timer on by allowing the selected input to increment TLx. TR0 is used to turn on Timer 0 and TR1 is used to turn on Timer 1.<\/p>\r\n&nbsp;\r\n<p style=\"text-align: justify\">When TLx overflows it increments THx, it means that TL is operating as a lower byte and TH is operating as a higher byte. When THx overflows it sets the timer overflow flag (TFx) in TCON register. Setting the TRx register, does not clear the THx and TLx timer registers. Timer registers can be accessed to obtain the current count or to enter preset values. They can be read at any time but TRx bit must be cleared.<\/p>\r\n&nbsp;\r\n<p style=\"text-align: justify\">The C\/T control bit (in TCON register) is used to select whether the operation is timer or counter. If C\/T bit is 1, then the operation is a counter, and if the bit is 0, then it indicates Timer operation. For timer operation, the timer register counts the divided-down peripheral clock : Frequency Of Oscillator \/ 12 in standard mode. For counter operation, the timer register counts the negative transitions on the Tx external input pin. Timer 0 and Timer 1 have four operating modes. Modes are selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both timer\/counters. Mode 3 is different.<\/p>\r\n\r\n<\/div>\r\n<div>\r\n\r\n&nbsp;\r\n\r\n<strong>1.3 Timer\u2019s clock frequency and its period<\/strong>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">In 8051-based system, the crystal oscillator has a frequency of 11.0592 MHz when C\/T bit of TMOD is 0. Each machine cycle is made up of 12 clock cycles.<\/p>\r\n&nbsp;\r\n\r\n<img class=\"size-full wp-image-94 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38.png\" alt=\"\" width=\"350\" height=\"113\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">Hence for a single machine cycle, the frequency becomes 1\/12 \u00d7 11.0529 MHz = 921.6 KHz. Since for a single second 921.6 \u00d7 103 work has been done. For a single machine cycle, the time taken is T = 1\/921.6 KHz = 1.085 us, so the oscillator takes 1.085us for completing a single machine cycle.<\/p>\r\n&nbsp;\r\n\r\n<strong>1.4 Timer registers<\/strong>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">TMOD, TCON, THx and TLx are the Timer registers. TMOD(Timer Mode) is used to select the mode of operation. TMOD is a 8-bit register. TCON(Timer control) is used to control the timer to run or stop. THx-TLx registers will hold the count to generate desired delay.<\/p>\r\n&nbsp;\r\n\r\n<img class=\"size-full wp-image-95 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39.png\" alt=\"\" width=\"462\" height=\"377\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">Figure 1.2 shows the Timer mode register . It contains 8 bits, where 0-3 bits corresponds to Timer 0 and 4-7 bits corresponds to timer 1. If the lower nibble is operated, then it corresponds to Timer 0; and if the upper nibble is operated, then it corresponds to Timer 1. If (M10,M00) bit pair is 00, then the timer is operated in mode 0, if the bit is 01, it indicates mode 1, if the bit is\u00a0<span style=\"font-size: 1em;text-align: initial\">10, then it is mode 2 and if the bit is 11 then it is mode 3. Mostly microcontroller is operated in mode1 and mode 2. The second and third bits are used for controlling the timer. If C\/T0# bit is 1, then Timer 0 is operated as counter, and if 0, as a Timer. Similarly, the fourth and fifth bit pairs are used for mode selection of Timer 1. The sixth and seventh bits are used for controlling Timer 1. In short, the lower 4 bits are used for Timer 0, upper 4 bits are for Timer 1 and also lower 2 bits are used to set the timer mode, upper 2 bits to specify the operation.<\/span><\/p>\r\n\r\n<\/div>\r\n<div>\r\n\r\n<img class=\"size-full wp-image-96 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40.png\" alt=\"\" width=\"637\" height=\"490\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">TCON register is also 8-bits wide. The bits IT0 and IE0 corresponds to Timer 0, IT1 and IE1 corresponds to Timer 1. IT is the Interrupt type and IE is the Interrupt Edge flag. To start the Timer, set the bit TR0=1 and to stop the timer 0, clear the bit. Similarly, TR1 bit is used for starting and stopping the Timer 1. TF0 and TF1 are used for indicating the overflow in Timer 0 and Timer 1 respectively.<\/p>\r\n\r\n<\/div>\r\n<div>\r\n\r\n<img class=\"size-full wp-image-97 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41.png\" alt=\"\" width=\"613\" height=\"171\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">It is a 16-bit timer. Therefore, it allows values of 0000 to FFFFH to be loaded into the timer\u2019s register TL and TH. After TH and TL are loaded with a 16-bit initial value, the timer must be started. This is done by SETB TR0 for timer 0 and SETB TR1 for timer 1. After the timer is started, it starts to count up. It counts up until it reaches its limit of FFFFH. After the timer reaches its limit and rolls over, in order to repeat the process , TH and TL must be reloaded with the original value, and TF must be reloaded to 0.<\/p>\r\n&nbsp;\r\n\r\n<strong><em>1.4.1 Mode 0<\/em><\/strong>\r\n\r\n<\/div>\r\n<img class=\"size-full wp-image-98 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42.png\" alt=\"\" width=\"511\" height=\"303\" \/>\r\n<div>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">THx+TLx =13 bits (8+5) are there for Timer\/counter operation. If C\/Tx is 1, then the negative transition TX input is passed through the TH and TL register, and it is operated as a timer. If C\/Tx is equal to 0, then clock input will be given to the registers, i.e., the clock is divided by 6 and then the operation is that of a counter. The overflow is indicated by the TFx bit in TCON register, which in turn generates the interrupt request. Mode 0 operation is similar to mode 1 and the only difference is that the number of bits in the THx and TLx register put together is 16 bits in mode1.<\/p>\r\n\r\n<\/div>\r\n<div>\r\n\r\n&nbsp;\r\n\r\n<strong><em>1.4.2 Mode 1<\/em><\/strong>\r\n\r\n<\/div>\r\n<img class=\"size-full wp-image-99 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43.png\" alt=\"\" width=\"613\" height=\"348\" \/>\r\n<div>\r\n\r\n<strong><em>1.4.2 Mode 2<\/em><\/strong>\r\n\r\n<\/div>\r\n<div>\r\n\r\n<img class=\"size-full wp-image-100 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44.png\" alt=\"\" width=\"621\" height=\"352\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">In mode 2, if the operation is a timer, then input is through mux. if TLx is incremented, then overflow occurs which is indicated by TCON register and the Interrupt request is generated. In this mode 2, when overflow occurs, the 8-bit values in THx will be loaded to TLx. Using these timers we can generate delay with following steps .<\/p>\r\n&nbsp;\r\n\r\n<strong>2. Steps for generating a delay<\/strong>\r\n\r\n&nbsp;\r\n\r\n1.\u00a0 Load the TMOD\u00a0 with mode and timer 0 or 1\r\n\r\n2.\u00a0 Load registers TL and TH with count corresponding to delay\r\n\r\n3.\u00a0 Start the timer\r\n\r\n4.\u00a0\u00a0 Continuously check the timer flag (TF) with the &lt;JNB TFx, target&gt; instruction to see if it is raised , if it is raised(TF=1) then get out of the loop.\r\n\r\n5.\u00a0 Stop the timer\r\n\r\n6.\u00a0 Clear the TF flag for the next round\r\n\r\n7.\u00a0 Go back to Step 2 to load TH and TL again\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">To generate a delay, the timer can be used in either mode 0 or mode1, but values to be loaded into TLx and THx registers to generate a specific delay time, are to be calculated.<\/p>\r\n&nbsp;\r\n\r\n<strong>2.1. Steps to calculate count to load into THx-TLx to generate desired delay<\/strong>\r\n\r\n&nbsp;\r\n\r\n(assume XTAL = 11.0592 MHz)\r\n\r\nSteps for finding the TH, TL registers values\r\n\r\n1.\u00a0 Divide the desired time delay by 1.085 us\r\n\r\n2.\u00a0 Perform 65536 \u2013 n, where n is the decimal value we got in Step 1\r\n\r\n3.\u00a0 Convert the result of Step 2 to hex, say we get yyxx. yyxx is the initial hex value to be loaded into the timer\u2019s register.\r\n\r\n4.\u00a0 Set TL = xx and TH = yy\r\n\r\n&nbsp;\r\n\r\n<em>2.1.1 Generate Delay =10ms with Clock frequency= 11.0592 MHz, use Timer0,mode1<\/em>\r\n\r\n&nbsp;\r\n\r\nGiven:\r\n\r\nTime delay=10ms\r\n\r\nclock frequency=11.0592 MHz\r\n\r\n&nbsp;\r\n\r\nStep 1: Divide the desired time delay by 1.085 us\r\n\r\nCount =10 ms\/ 1.085 us=9216\r\n\r\n&nbsp;\r\n\r\nStep 2: Perform 65536 \u2013 n 65536-9216=56320= DC00H\r\n\r\n&nbsp;\r\n\r\nStep 3: Set TL = xx and TH = yy\r\n\r\n&nbsp;\r\n\r\nHere xx=DC and yy=00,Hence,TH0=DC and TL0=00.\r\n\r\n&nbsp;\r\n\r\nFollowing is the assembly code program to generate a delay of 10ms\r\n\r\n<\/div>\r\n<div>\r\n\r\n&nbsp;\r\n\r\nMOV TMOD,#01\u00a0;Timer 0, mode 1, 16-bitmode\r\n\r\n&nbsp;\r\n\r\nHERE: MOV TL0,#00\u00a0;TL0=0, the low byte\r\n\r\n&nbsp;\r\n\r\nMOV TH0,#0DCH\u00a0;TH0=DC, the high byte\r\n\r\n&nbsp;\r\n\r\nSETB TR0\u00a0;Start timer 0\r\n\r\n&nbsp;\r\n\r\nAGAIN: JNB TF0,AGAIN\u00a0;Monitor timer flag 0\r\n\r\n&nbsp;\r\n\r\nCLR TR0\u00a0;Stop the timer 0\r\n\r\n&nbsp;\r\n\r\nCLR TF0\u00a0;Clear timer 0 flag\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\"><span style=\"font-size: 1em;text-align: initial\">The first statement in the code indicates the Timer 0 mode 1 operation(the LSB indicates Timer 0 and MSB indicates the mode). From the above calculation, the value 00 has to be loaded to the Timer TL0 and DC is loaded to TH0. Once the values are loaded, the timer 0 is started using the SETB command. The control instruction JNB TF0 is used for checking the overflow. The overflow is indicated by TF0 flag. This statement will jump to the same loop AGAIN until the overflow occurs. Thus a delay is generated for 10ms. Then if time exceeds 10ms, TR0 and TF0 flags are cleared since the system cannot do that on its own.<\/span><\/p>\r\n&nbsp;\r\n<p style=\"text-align: justify\"><span style=\"text-align: initial;font-size: 1em\">We can generate a pulse generator with the use of these timers. Following is the program to generate 5Khz pulse\/clock generator.<\/span><\/p>\r\n\r\n<\/div>\r\n<div>\r\n\r\n&nbsp;\r\n\r\n<em>2.1.2 Program to generate a square wave of 5 kHz frequency on pin P1.0, clock frequency =11.0592 MHz<\/em>\r\n\r\n&nbsp;\r\n\r\nGiven:\r\n\r\n&nbsp;\r\n\r\nSquare wave frequency=5 kHz\r\n\r\nclock frequency=11.0592 MHz\r\n\r\n&nbsp;\r\n\r\nStep 1: Calculate the Time delay\r\n\r\n&nbsp;\r\n\r\nT=1\/f=1\/5 kHz =0.2 ms\r\n\r\nT=0.2 ms which is the period of square wave\r\n\r\n&nbsp;\r\n\r\nT\/2 =0.2\/2=0.1 ms delay for high and low\r\n\r\n&nbsp;\r\n\r\nStep 2: Divide the desired time delay by 1.085 us\r\n\r\nCount=0.1ms\/1.085 us = 921\r\n\r\n&nbsp;\r\n\r\nStep 3: Perform 65536 \u2013 n\r\n\r\n&nbsp;\r\n\r\nTH0-TL0= 65536-921=64615=FC67H\r\n\r\n&nbsp;\r\n\r\nStep 4: Set TL = xx and TH = yy\r\n\r\n&nbsp;\r\n\r\nHere xx=FC and yy=67. Hence,TH0=FCh,TL0=67h\r\n\r\n<\/div>\r\n<span style=\"text-align: initial;font-size: 1em\">\u00a0 \u00a0MOV TMOD,#01\u00a0;Timer 0, mode 1, 16-bitmode<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">AGAIN: MOV TL1,#67H\u00a0;TL1=67, low byte of timer<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">MOV TH1,#0FCH\u00a0;TH1=FC, the high byte<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">SETB TR1\u00a0;Start timer 1<\/span>\r\n\r\n&nbsp;\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">BACK:<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">JNB TF1,BACK\u00a0;until timer rolls over<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">CPL P1.0\u00a0; compliment P1.0<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">CLR TR1\u00a0;Stop the timer 1<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">CLR TF1\u00a0;Clear tim er 1 flag<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">SJMP AGAIN\u00a0;Reload timer<\/span>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\"><span style=\"text-align: initial;font-size: 1em\">The first statement is used to set Timer 0 mode1 operation. Then the preset values are given to the respective TL1 and TH1 register. Once the values are loaded into the register, the Timer 1 is started. The control instruction JNB is used for checking the overflow. Then the port P1.0 is complemented for generating the square wave. Then the flags TR1 and TF1 flags are cleared.<\/span><\/p>\r\n\r\n<div>\r\n\r\n&nbsp;\r\n\r\n<strong>2.2 Steps for generating delay in MODE 2<\/strong>\r\n\r\n&nbsp;\r\n\r\n1.\u00a0 Select timer in TMOD register indicating which timer (timer 0 or timer 1) is to be used, and the timer mode (mode 2) to be selected\r\n\r\n&nbsp;\r\n\r\n2. TH register loaded with initial count value\r\n\r\n&nbsp;\r\n\r\n3. Start timer\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">4. Continuously monitoring the timer flag (TF) with the JNB TFx,target instruction to see whether TFx is \u20181\u2019 (high) . Get out of the loop when TF goes high<\/p>\r\n&nbsp;\r\n\r\n5. Clear the TF flag\r\n\r\n&nbsp;\r\n\r\n6. Go back to Step4, since mode 2 is auto-reload\r\n\r\n&nbsp;\r\n\r\n<em>2.2.1 Creating delay for 25 cycles using mode2 timer1<\/em>\r\n\r\n&nbsp;\r\n\r\nDELAY:\r\n\r\nMOV TMOD,#20h\r\n\r\nMOV TH1,#-25\r\n\r\nSETB TR1\r\n\r\nLOOP: JNB TF1, LOOP\r\n\r\nCLR TF1\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">Here, irrespective of the clock frequency, a delay of 25 cycles is generated. Initially timer 1 mode 2 operation is set, and then TH1 flag is set to -25. Then the timer TR1 is started. Then the control instruction is used for creating a delay of 25 cycles and the flag TF1 is cleared.<\/p>\r\n&nbsp;\r\n<p style=\"text-align: justify\">We can make toggling\/blinking of LEDs using timers with standard delay.<\/p>\r\n&nbsp;\r\n\r\n<em>2.2.2 Toggle LED connected at P1.0 with 5 microsec delay using timer1 and mode 2<\/em>\r\n\r\n<\/div>\r\n&nbsp;\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">MOV TMOD,#20\u00a0;Timer 1 mode 2, 8-bit auto reload<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">AGAIN: MOV TL1,#-5\u00a0;TL1=256-5, low byte of timer<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">MOV TH1,# -5\u00a0;TH1=256-5, the high byte<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">SETB TR1\u00a0;Start timer 1<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">BACK: JNB TF1,BACK\u00a0;until timer rolls over<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">CPL P1.0\u00a0; compliment P1.0 toggle LED<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">CLR TF1\u00a0;Stop the timer 1<\/span>\r\n\r\n<span style=\"text-align: initial;font-size: 1em\">SJMP BACK\u00a0; loop<\/span>\r\n\r\n<img class=\"size-full wp-image-101 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-45.png\" alt=\"\" width=\"231\" height=\"142\" \/>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">This assembly program demonstrates the blinking of LED connected at P1.0 with 5 micosecond delay. As TH1 is loaded with \u201c-5\u201d it generates 5 machine cycle time delay. As one cycle takes 1 micro second for 12 MHz oscillator, this delay generates a 5 micro sec delay. So LED blinking with 5 micro sec delay is generated with above code.<\/p>\r\n&nbsp;\r\n\r\n<strong>3. Summary<\/strong>\r\n\r\n&nbsp;\r\n<p style=\"text-align: justify\">In this lecture different timers and its modes are discussed. The importance of Timer control registers and its structures are also discussed and various steps to create different delay routines using different timers, and also in different modes are seen. Sample code for generating these delays are also demonstrated.<\/p>\r\n&nbsp;\r\n\r\n<strong>4. References<\/strong>\r\n<ol>\r\n \t<li>The 8051 Microcontroller and Embedded Systems Using Assembly and C Second Edition Muhammad Ali Mazidi, Janice Gillispie Mazidi and Rolin D. McKinlay.<\/li>\r\n<\/ol>\r\n&nbsp;\r\n\r\n<strong>Supporting &amp; Reference Materials<\/strong>\r\n<ol>\r\n \t<li style=\"text-align: justify\">The 8051 Microcontroller and Embedded Systems Using Assembly and C Second Edition Muhammad Ali Mazidi, Janice Gillispie Mazidi and Rolin D. McKinlay.<\/li>\r\n \t<li style=\"text-align: justify\">http:\/\/what-when-how.com\/8051-microcontroller\/programming-8051-timers\/<\/li>\r\n<\/ol>\r\n&nbsp;","rendered":"<div>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">In this lecture, different timers and its modes will be discussed. Importance of Timer control registers for configuring timers and its structures will be discussed. Different delay routines using timers and different timer modes will be created and shown using assembly code.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>1. Timers<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">In 8051 microcontroller, there are two 16-bit timers, namely, Timer 0 and Timer 1. These timers can be configured to work as counter, and also independently configured to operate in a variety of modes as a timer or as an event counter. Timers &amp; Counters in 8051 controllers are used to create Interval timing for a product, Periodic event timing, Timer base for measurements and also to generate Baud Rate for serial communication. Counters are used for event Counting using timers in 16-bit mode\/ 8 bit mode. When operating as a timer, the timer\/counter runs for a programmed length of time, then issues an interrupt request. When operating as a counter, the timer\/counter counts negative transitions on an external pin. After a preset number of counts, the counter issues an interrupt request.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>1.1 Operation<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">Timer consists of registers THx and TLx (x= 0, 1) connected in cascade to form a 16-bit timer i.e register TH0 and TL0 are combined together to form Timer 0 and register TH1 and TL1 are combined together to form Timer1. For controlling the timer, the run control bit (TRx) in TCON register is used which turns the timer on by allowing the selected input to increment TLx. TR0 is used to turn on Timer 0 and TR1 is used to turn on Timer 1.<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">When TLx overflows it increments THx, it means that TL is operating as a lower byte and TH is operating as a higher byte. When THx overflows it sets the timer overflow flag (TFx) in TCON register. Setting the TRx register, does not clear the THx and TLx timer registers. Timer registers can be accessed to obtain the current count or to enter preset values. They can be read at any time but TRx bit must be cleared.<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">The C\/T control bit (in TCON register) is used to select whether the operation is timer or counter. If C\/T bit is 1, then the operation is a counter, and if the bit is 0, then it indicates Timer operation. For timer operation, the timer register counts the divided-down peripheral clock : Frequency Of Oscillator \/ 12 in standard mode. For counter operation, the timer register counts the negative transitions on the Tx external input pin. Timer 0 and Timer 1 have four operating modes. Modes are selected by bit-pairs (M1, M0) in TMOD. Modes 0, 1, and 2 are the same for both timer\/counters. Mode 3 is different.<\/p>\n<\/div>\n<div>\n<p>&nbsp;<\/p>\n<p><strong>1.3 Timer\u2019s clock frequency and its period<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">In 8051-based system, the crystal oscillator has a frequency of 11.0592 MHz when C\/T bit of TMOD is 0. Each machine cycle is made up of 12 clock cycles.<\/p>\n<p>&nbsp;<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-94 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38.png\" alt=\"\" width=\"350\" height=\"113\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38.png 350w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38-300x97.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38-65x21.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-38-225x73.png 225w\" sizes=\"auto, (max-width: 350px) 100vw, 350px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">Hence for a single machine cycle, the frequency becomes 1\/12 \u00d7 11.0529 MHz = 921.6 KHz. Since for a single second 921.6 \u00d7 103 work has been done. For a single machine cycle, the time taken is T = 1\/921.6 KHz = 1.085 us, so the oscillator takes 1.085us for completing a single machine cycle.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>1.4 Timer registers<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">TMOD, TCON, THx and TLx are the Timer registers. TMOD(Timer Mode) is used to select the mode of operation. TMOD is a 8-bit register. TCON(Timer control) is used to control the timer to run or stop. THx-TLx registers will hold the count to generate desired delay.<\/p>\n<p>&nbsp;<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-95 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39.png\" alt=\"\" width=\"462\" height=\"377\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39.png 462w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39-300x245.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39-65x53.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39-225x184.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-39-350x286.png 350w\" sizes=\"auto, (max-width: 462px) 100vw, 462px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">Figure 1.2 shows the Timer mode register . It contains 8 bits, where 0-3 bits corresponds to Timer 0 and 4-7 bits corresponds to timer 1. If the lower nibble is operated, then it corresponds to Timer 0; and if the upper nibble is operated, then it corresponds to Timer 1. If (M10,M00) bit pair is 00, then the timer is operated in mode 0, if the bit is 01, it indicates mode 1, if the bit is\u00a0<span style=\"font-size: 1em;text-align: initial\">10, then it is mode 2 and if the bit is 11 then it is mode 3. Mostly microcontroller is operated in mode1 and mode 2. The second and third bits are used for controlling the timer. If C\/T0# bit is 1, then Timer 0 is operated as counter, and if 0, as a Timer. Similarly, the fourth and fifth bit pairs are used for mode selection of Timer 1. The sixth and seventh bits are used for controlling Timer 1. In short, the lower 4 bits are used for Timer 0, upper 4 bits are for Timer 1 and also lower 2 bits are used to set the timer mode, upper 2 bits to specify the operation.<\/span><\/p>\n<\/div>\n<div>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-96 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40.png\" alt=\"\" width=\"637\" height=\"490\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40.png 637w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40-300x231.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40-65x50.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40-225x173.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-40-350x269.png 350w\" sizes=\"auto, (max-width: 637px) 100vw, 637px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">TCON register is also 8-bits wide. The bits IT0 and IE0 corresponds to Timer 0, IT1 and IE1 corresponds to Timer 1. IT is the Interrupt type and IE is the Interrupt Edge flag. To start the Timer, set the bit TR0=1 and to stop the timer 0, clear the bit. Similarly, TR1 bit is used for starting and stopping the Timer 1. TF0 and TF1 are used for indicating the overflow in Timer 0 and Timer 1 respectively.<\/p>\n<\/div>\n<div>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-97 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41.png\" alt=\"\" width=\"613\" height=\"171\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41.png 613w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41-300x84.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41-65x18.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41-225x63.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-41-350x98.png 350w\" sizes=\"auto, (max-width: 613px) 100vw, 613px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">It is a 16-bit timer. Therefore, it allows values of 0000 to FFFFH to be loaded into the timer\u2019s register TL and TH. After TH and TL are loaded with a 16-bit initial value, the timer must be started. This is done by SETB TR0 for timer 0 and SETB TR1 for timer 1. After the timer is started, it starts to count up. It counts up until it reaches its limit of FFFFH. After the timer reaches its limit and rolls over, in order to repeat the process , TH and TL must be reloaded with the original value, and TF must be reloaded to 0.<\/p>\n<p>&nbsp;<\/p>\n<p><strong><em>1.4.1 Mode 0<\/em><\/strong><\/p>\n<\/div>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-98 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42.png\" alt=\"\" width=\"511\" height=\"303\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42.png 511w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42-300x178.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42-65x39.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42-225x133.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-42-350x208.png 350w\" sizes=\"auto, (max-width: 511px) 100vw, 511px\" \/><\/p>\n<div>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">THx+TLx =13 bits (8+5) are there for Timer\/counter operation. If C\/Tx is 1, then the negative transition TX input is passed through the TH and TL register, and it is operated as a timer. If C\/Tx is equal to 0, then clock input will be given to the registers, i.e., the clock is divided by 6 and then the operation is that of a counter. The overflow is indicated by the TFx bit in TCON register, which in turn generates the interrupt request. Mode 0 operation is similar to mode 1 and the only difference is that the number of bits in the THx and TLx register put together is 16 bits in mode1.<\/p>\n<\/div>\n<div>\n<p>&nbsp;<\/p>\n<p><strong><em>1.4.2 Mode 1<\/em><\/strong><\/p>\n<\/div>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-99 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43.png\" alt=\"\" width=\"613\" height=\"348\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43.png 613w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43-300x170.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43-65x37.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43-225x128.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-43-350x199.png 350w\" sizes=\"auto, (max-width: 613px) 100vw, 613px\" \/><\/p>\n<div>\n<p><strong><em>1.4.2 Mode 2<\/em><\/strong><\/p>\n<\/div>\n<div>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-100 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44.png\" alt=\"\" width=\"621\" height=\"352\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44.png 621w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44-300x170.png 300w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44-65x37.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44-225x128.png 225w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-44-350x198.png 350w\" sizes=\"auto, (max-width: 621px) 100vw, 621px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">In mode 2, if the operation is a timer, then input is through mux. if TLx is incremented, then overflow occurs which is indicated by TCON register and the Interrupt request is generated. In this mode 2, when overflow occurs, the 8-bit values in THx will be loaded to TLx. Using these timers we can generate delay with following steps .<\/p>\n<p>&nbsp;<\/p>\n<p><strong>2. Steps for generating a delay<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p>1.\u00a0 Load the TMOD\u00a0 with mode and timer 0 or 1<\/p>\n<p>2.\u00a0 Load registers TL and TH with count corresponding to delay<\/p>\n<p>3.\u00a0 Start the timer<\/p>\n<p>4.\u00a0\u00a0 Continuously check the timer flag (TF) with the &lt;JNB TFx, target&gt; instruction to see if it is raised , if it is raised(TF=1) then get out of the loop.<\/p>\n<p>5.\u00a0 Stop the timer<\/p>\n<p>6.\u00a0 Clear the TF flag for the next round<\/p>\n<p>7.\u00a0 Go back to Step 2 to load TH and TL again<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">To generate a delay, the timer can be used in either mode 0 or mode1, but values to be loaded into TLx and THx registers to generate a specific delay time, are to be calculated.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>2.1. Steps to calculate count to load into THx-TLx to generate desired delay<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p>(assume XTAL = 11.0592 MHz)<\/p>\n<p>Steps for finding the TH, TL registers values<\/p>\n<p>1.\u00a0 Divide the desired time delay by 1.085 us<\/p>\n<p>2.\u00a0 Perform 65536 \u2013 n, where n is the decimal value we got in Step 1<\/p>\n<p>3.\u00a0 Convert the result of Step 2 to hex, say we get yyxx. yyxx is the initial hex value to be loaded into the timer\u2019s register.<\/p>\n<p>4.\u00a0 Set TL = xx and TH = yy<\/p>\n<p>&nbsp;<\/p>\n<p><em>2.1.1 Generate Delay =10ms with Clock frequency= 11.0592 MHz, use Timer0,mode1<\/em><\/p>\n<p>&nbsp;<\/p>\n<p>Given:<\/p>\n<p>Time delay=10ms<\/p>\n<p>clock frequency=11.0592 MHz<\/p>\n<p>&nbsp;<\/p>\n<p>Step 1: Divide the desired time delay by 1.085 us<\/p>\n<p>Count =10 ms\/ 1.085 us=9216<\/p>\n<p>&nbsp;<\/p>\n<p>Step 2: Perform 65536 \u2013 n 65536-9216=56320= DC00H<\/p>\n<p>&nbsp;<\/p>\n<p>Step 3: Set TL = xx and TH = yy<\/p>\n<p>&nbsp;<\/p>\n<p>Here xx=DC and yy=00,Hence,TH0=DC and TL0=00.<\/p>\n<p>&nbsp;<\/p>\n<p>Following is the assembly code program to generate a delay of 10ms<\/p>\n<\/div>\n<div>\n<p>&nbsp;<\/p>\n<p>MOV TMOD,#01\u00a0;Timer 0, mode 1, 16-bitmode<\/p>\n<p>&nbsp;<\/p>\n<p>HERE: MOV TL0,#00\u00a0;TL0=0, the low byte<\/p>\n<p>&nbsp;<\/p>\n<p>MOV TH0,#0DCH\u00a0;TH0=DC, the high byte<\/p>\n<p>&nbsp;<\/p>\n<p>SETB TR0\u00a0;Start timer 0<\/p>\n<p>&nbsp;<\/p>\n<p>AGAIN: JNB TF0,AGAIN\u00a0;Monitor timer flag 0<\/p>\n<p>&nbsp;<\/p>\n<p>CLR TR0\u00a0;Stop the timer 0<\/p>\n<p>&nbsp;<\/p>\n<p>CLR TF0\u00a0;Clear timer 0 flag<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\"><span style=\"font-size: 1em;text-align: initial\">The first statement in the code indicates the Timer 0 mode 1 operation(the LSB indicates Timer 0 and MSB indicates the mode). From the above calculation, the value 00 has to be loaded to the Timer TL0 and DC is loaded to TH0. Once the values are loaded, the timer 0 is started using the SETB command. The control instruction JNB TF0 is used for checking the overflow. The overflow is indicated by TF0 flag. This statement will jump to the same loop AGAIN until the overflow occurs. Thus a delay is generated for 10ms. Then if time exceeds 10ms, TR0 and TF0 flags are cleared since the system cannot do that on its own.<\/span><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\"><span style=\"text-align: initial;font-size: 1em\">We can generate a pulse generator with the use of these timers. Following is the program to generate 5Khz pulse\/clock generator.<\/span><\/p>\n<\/div>\n<div>\n<p>&nbsp;<\/p>\n<p><em>2.1.2 Program to generate a square wave of 5 kHz frequency on pin P1.0, clock frequency =11.0592 MHz<\/em><\/p>\n<p>&nbsp;<\/p>\n<p>Given:<\/p>\n<p>&nbsp;<\/p>\n<p>Square wave frequency=5 kHz<\/p>\n<p>clock frequency=11.0592 MHz<\/p>\n<p>&nbsp;<\/p>\n<p>Step 1: Calculate the Time delay<\/p>\n<p>&nbsp;<\/p>\n<p>T=1\/f=1\/5 kHz =0.2 ms<\/p>\n<p>T=0.2 ms which is the period of square wave<\/p>\n<p>&nbsp;<\/p>\n<p>T\/2 =0.2\/2=0.1 ms delay for high and low<\/p>\n<p>&nbsp;<\/p>\n<p>Step 2: Divide the desired time delay by 1.085 us<\/p>\n<p>Count=0.1ms\/1.085 us = 921<\/p>\n<p>&nbsp;<\/p>\n<p>Step 3: Perform 65536 \u2013 n<\/p>\n<p>&nbsp;<\/p>\n<p>TH0-TL0= 65536-921=64615=FC67H<\/p>\n<p>&nbsp;<\/p>\n<p>Step 4: Set TL = xx and TH = yy<\/p>\n<p>&nbsp;<\/p>\n<p>Here xx=FC and yy=67. Hence,TH0=FCh,TL0=67h<\/p>\n<\/div>\n<p><span style=\"text-align: initial;font-size: 1em\">\u00a0 \u00a0MOV TMOD,#01\u00a0;Timer 0, mode 1, 16-bitmode<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">AGAIN: MOV TL1,#67H\u00a0;TL1=67, low byte of timer<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">MOV TH1,#0FCH\u00a0;TH1=FC, the high byte<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">SETB TR1\u00a0;Start timer 1<\/span><\/p>\n<p>&nbsp;<\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">BACK:<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">JNB TF1,BACK\u00a0;until timer rolls over<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">CPL P1.0\u00a0; compliment P1.0<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">CLR TR1\u00a0;Stop the timer 1<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">CLR TF1\u00a0;Clear tim er 1 flag<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">SJMP AGAIN\u00a0;Reload timer<\/span><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\"><span style=\"text-align: initial;font-size: 1em\">The first statement is used to set Timer 0 mode1 operation. Then the preset values are given to the respective TL1 and TH1 register. Once the values are loaded into the register, the Timer 1 is started. The control instruction JNB is used for checking the overflow. Then the port P1.0 is complemented for generating the square wave. Then the flags TR1 and TF1 flags are cleared.<\/span><\/p>\n<div>\n<p>&nbsp;<\/p>\n<p><strong>2.2 Steps for generating delay in MODE 2<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p>1.\u00a0 Select timer in TMOD register indicating which timer (timer 0 or timer 1) is to be used, and the timer mode (mode 2) to be selected<\/p>\n<p>&nbsp;<\/p>\n<p>2. TH register loaded with initial count value<\/p>\n<p>&nbsp;<\/p>\n<p>3. Start timer<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">4. Continuously monitoring the timer flag (TF) with the JNB TFx,target instruction to see whether TFx is \u20181\u2019 (high) . Get out of the loop when TF goes high<\/p>\n<p>&nbsp;<\/p>\n<p>5. Clear the TF flag<\/p>\n<p>&nbsp;<\/p>\n<p>6. Go back to Step4, since mode 2 is auto-reload<\/p>\n<p>&nbsp;<\/p>\n<p><em>2.2.1 Creating delay for 25 cycles using mode2 timer1<\/em><\/p>\n<p>&nbsp;<\/p>\n<p>DELAY:<\/p>\n<p>MOV TMOD,#20h<\/p>\n<p>MOV TH1,#-25<\/p>\n<p>SETB TR1<\/p>\n<p>LOOP: JNB TF1, LOOP<\/p>\n<p>CLR TF1<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">Here, irrespective of the clock frequency, a delay of 25 cycles is generated. Initially timer 1 mode 2 operation is set, and then TH1 flag is set to -25. Then the timer TR1 is started. Then the control instruction is used for creating a delay of 25 cycles and the flag TF1 is cleared.<\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">We can make toggling\/blinking of LEDs using timers with standard delay.<\/p>\n<p>&nbsp;<\/p>\n<p><em>2.2.2 Toggle LED connected at P1.0 with 5 microsec delay using timer1 and mode 2<\/em><\/p>\n<\/div>\n<p>&nbsp;<\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">MOV TMOD,#20\u00a0;Timer 1 mode 2, 8-bit auto reload<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">AGAIN: MOV TL1,#-5\u00a0;TL1=256-5, low byte of timer<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">MOV TH1,# -5\u00a0;TH1=256-5, the high byte<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">SETB TR1\u00a0;Start timer 1<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">BACK: JNB TF1,BACK\u00a0;until timer rolls over<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">CPL P1.0\u00a0; compliment P1.0 toggle LED<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">CLR TF1\u00a0;Stop the timer 1<\/span><\/p>\n<p><span style=\"text-align: initial;font-size: 1em\">SJMP BACK\u00a0; loop<\/span><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"size-full wp-image-101 aligncenter\" src=\"http:\/\/csp13.epgpbooks.inflibnet.ac.in\/wp-content\/uploads\/sites\/62\/2018\/07\/2-45.png\" alt=\"\" width=\"231\" height=\"142\" srcset=\"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-45.png 231w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-45-65x40.png 65w, https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-content\/uploads\/sites\/62\/2018\/07\/2-45-225x138.png 225w\" sizes=\"auto, (max-width: 231px) 100vw, 231px\" \/><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">This assembly program demonstrates the blinking of LED connected at P1.0 with 5 micosecond delay. As TH1 is loaded with \u201c-5\u201d it generates 5 machine cycle time delay. As one cycle takes 1 micro second for 12 MHz oscillator, this delay generates a 5 micro sec delay. So LED blinking with 5 micro sec delay is generated with above code.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>3. Summary<\/strong><\/p>\n<p>&nbsp;<\/p>\n<p style=\"text-align: justify\">In this lecture different timers and its modes are discussed. The importance of Timer control registers and its structures are also discussed and various steps to create different delay routines using different timers, and also in different modes are seen. Sample code for generating these delays are also demonstrated.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>4. References<\/strong><\/p>\n<ol>\n<li>The 8051 Microcontroller and Embedded Systems Using Assembly and C Second Edition Muhammad Ali Mazidi, Janice Gillispie Mazidi and Rolin D. McKinlay.<\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n<p><strong>Supporting &amp; Reference Materials<\/strong><\/p>\n<ol>\n<li style=\"text-align: justify\">The 8051 Microcontroller and Embedded Systems Using Assembly and C Second Edition Muhammad Ali Mazidi, Janice Gillispie Mazidi and Rolin D. McKinlay.<\/li>\n<li style=\"text-align: justify\">http:\/\/what-when-how.com\/8051-microcontroller\/programming-8051-timers\/<\/li>\n<\/ol>\n<p>&nbsp;<\/p>\n","protected":false},"author":2,"menu_order":9,"template":"","meta":{"pb_show_title":"on","pb_short_title":"","pb_subtitle":"","pb_authors":[],"pb_section_license":""},"chapter-type":[],"contributor":[],"license":[],"class_list":["post-91","chapter","type-chapter","status-publish","hentry"],"part":3,"_links":{"self":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapters\/91","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapters"}],"about":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/wp\/v2\/types\/chapter"}],"author":[{"embeddable":true,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/wp\/v2\/users\/2"}],"version-history":[{"count":4,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapters\/91\/revisions"}],"predecessor-version":[{"id":442,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapters\/91\/revisions\/442"}],"part":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/parts\/3"}],"metadata":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapters\/91\/metadata\/"}],"wp:attachment":[{"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/wp\/v2\/media?parent=91"}],"wp:term":[{"taxonomy":"chapter-type","embeddable":true,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/pressbooks\/v2\/chapter-type?post=91"},{"taxonomy":"contributor","embeddable":true,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/wp\/v2\/contributor?post=91"},{"taxonomy":"license","embeddable":true,"href":"https:\/\/ebooks.inflibnet.ac.in\/csp13\/wp-json\/wp\/v2\/license?post=91"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}